The ispGAL 16Z8 was introduced by Lattice in 1986, one year after introduction of the GAL 16V8. ispGAL, is short for In-System re-Programmable GENERIC ARRAY LOGIC. It is only listed in the 1988 Data Book and was soon replaced by the ispGAL 22V10.
The GAL 16V8 is a direct replacement for most 20 pin PALs. This CMOS device was the first electrically erasable programmable logic device and has been produced until 2010.
ispGAL 16Z8 and ispGAL 22V10 Simple Programmable Logic Devices (SPLD)
pLSI 1016 and ispLSI 1016 Complex Programmable Logic Devices (CPLD)
Introduction of the in-system programmable ispLSI 1016 CPLD in 1992.
LATTICE STAND-ALONE DEVICE PROGRAMMER
The MODEL 100 Programmer
It supports these ispLSI device family members:
1000, 1000E, 1000EA, 2000/A, 2000E, 2000VL, 2000VE, 2000V, 3000, 5000V AND 8000V
(Supported Vcc is 5V only)
The Model 200 Programmer
For Workstations with RS-232 Interface, supports only 5V ispLSI devices.
It supports these ispLSI device family members:
1000, 2000, 3000, 5000
The Model 300 Programmer
It supports all programmable Lattice devices with Vcc of 1.2V, 1.8V, 2.5V, 3.3V and 5V.
pDS (pLSI/ispLSI Development System) Software
The pDS Software provides Boolean Entry and Fitting only. Partitioning of the logic into the individual GLBs (Generic Logic Block) has to be done manually.
From Beginner’s Guide to ispLSI and pLSI Using pDS Software:
pDS-Software distributed by Eurodis Enatechnik (EU) and ALDEC/Marshall Industries (USA)
ISP Synario Starter Software
Development Hardware Boards for ispLSI 1016
Windows 98 and ISP Synario Starter running on a HP Compaq t5000 Thin-Client
Window of the Synario Project Navigator after opening the “Tach.syn” example project.
Top level schematic of the “Tach” logic design (see above).
The Text Editor for ABEL (without Syntax Highlighting).
The stand-alone ISP Daisy Chain Download tool for the PC’s Parallel Port.
Software Evolution
Synario software was replaced by ispDesignEXPERT in the late 1990s which later was superseded by ispLEVER Classic in 2008.