Vector Clock

Inside view: scan line PCB replaced by vector PCB
Clock face on a 5.5″ TV


In the late seventies vector graphic arcade video games like Asteroids became a huge success. A few years later the GCE Vectrex Home Arcade System was released. But even today the unique CRT phosphor glow hasn’t lost any of its fascination.

This blog decribes a circuit which will turn a monochrome TV set into a time and temperature display. It’s a way to recycle a TV before it finally ends up in the dumpster.


  • Rotary encoder user interface
  • Radio controlled (DCF77 time code)
  • Automatic pulse polarity detection of time code signal
  • Real time display of time code pulse signal for easy receiver alignment
  • SuperCapacitor backup
  • Bootstrapped low dropout (50mV) 12V DC 0.6A regulator allows reuse of power adapter
  • TDA8359 BTL yoke drivers for single supply operation
  • ATMEGA32 micro controller and TLC7528, AD7524 ADCs
  • DS18B20 temperature sensors
  • Software implementation MCP3201 12-bit DAC
  • Optional UART interface


Screen options

Analog clock
Digital clock 24h
Real time view of DCF77 time code pulse
Inside and outside temperature
Past 24 hour temperature graph


Digital Section

Circuit Description

RTC functionality is implemented in software but relies on SuperCapacitor C1 and 32kHz watch crystal. During a power down only Timer2 and Osc2 are operating. A wake-up is generated every second for timekeeping. The Power Good (PWR_GOOD) signal on IC1 PA7 triggers the transition to RTC mode (power down).

PA6 is the input for the time code pulse. PA0 to PA3 are reserved for DS18B20 sensor pulse input.


Supply Section

+5V & +12V Supply

Circuit Description

The main 12V supply VREG is regulated by N-MOSFET (T1) and a classic TL431 (VR1). It can be disabled by /ON=high which lowers the gate voltage to 2.5V and VREG to ca. 1V in order to reduce power consumption. On power-up D2 supplies the gate. When the HVT (High Voltage Transformer) is energized the gate supply is bootstrapped by R31 to ca. VREG+18V.


DAC Section

Circuit Description

The DAC circuit is designed to match the TDA8359 input requirements. IC3 supplies the reference voltage VREF for IC2 DAC_A & DAC_B. Thus IC2 operates in multiplying mode, allowing the modulation of OUTA/B magnitude by VREF. OUTA/B swing up to 0.5V from midpoint 0.9V (no beam deflection).

H-OUT on IC4B pin 7


Deflection Output Stages

Circuit Description

Two TDA8359 in BTL configuration drive the horizontal and vertical deflection yokes. Damping resistors R33 & R37 minimize oscillations and must be selected for optimal dynamic performance. R35 & R41 are current sense resistors. Picture size can be adjusted by R39 & R40.

CRT with deflection yoke

Tested on TV sets:

  • Clatronic TV486S
  • Sailor SA-300
  • Micromaxx MM5493
  • ICE TV1006

Others may work after modification of the vertical yoke windings configuraton. A parallel configuraton of the two windings reduces the inductance and improves the dynamic performance.

Vertical yoke

Since vertical yokes in the TV sets were desinged to operate at 50/60Hz low frequency the number of turns is high and also the inductance. A low driving current is desired for scan line operation but for vector operation the dynamic performance is crucial. The limiting factors of dynamic performance are the vertical yoke inductance and VREG. A poor dynamic performance increases the settling time for the desired current and as a result lesser vectors can be drawn. Since the deflection current is mainly related to the picture content a higher VREG will increase the power consumption by Delta_VREG x I_deflection.

High Voltage Transformer

Many 5.5″ TV sets use a BSH8-NB HVT and have the same CRT pinout. The high voltage is PWM controlled by ATMEGA Timer1. Shielding of HVT and L1 is mandatory due to interference. A recycled tin can or box connected to GND works best.


Vector Clock